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NXP Semiconductors
PCA9624
8-bit Fm+ I 2 C-bus 100 mA 40 V LED driver
7.3.5 GRPFREQ, group frequency
Table 9. GRPFREQ - Group Frequency register (address 0Bh) bit description
Legend: * default value.
Address
0Bh
Register
GRPFREQ
Bit
7:0
Symbol
GFRQ[7:0]
Access
R/W
Value
0000 0000*
Description
GRPFREQ register
GRPFREQ is used to program the global blinking period when DMBLNK bit (MODE2
register) is equal to 1. Value in this register is a ‘Don’t care’ when DMBLNK = 0.
Applicable to LED outputs programmed with LDRx = 11 (LEDOUT0 to LEDOUT3
registers).
Blinking period is controlled through 256 linear steps from 00h (41 ms, frequency 24 Hz)
to FFh (10.73 s).
global blinking period = ---------------------------------------- ? s ?
GFRQ ? 7 : 0 ? + 1
24
7.3.6 LEDOUT0 and LEDOUT1, LED driver output state
(3)
Table 10.
LEDOUT0 to LEDOUT1 - LED driver output state register (address 0Ch to 0Dh)
bit description
Legend: * default value.
Address
0Ch
0Dh
Register
LEDOUT0
LEDOUT1
Bit
7:6
5:4
3:2
1:0
7:6
5:4
3:2
1:0
Symbol
LDR3
LDR2
LDR1
LDR0
LDR7
LDR6
LDR5
LDR4
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Value
00*
00*
00*
00*
00*
00*
00*
00*
Description
LED3 output state control
LED2 output state control
LED1 output state control
LED0 output state control
LED7 output state control
LED6 output state control
LED5 output state control
LED4 output state control
LDRx = 00 — LED driver x is off (default power-up state).
LDRx = 01 — LED driver x is fully on (individual brightness and group dimming/blinking
not controlled).
LDRx = 10 — LED driver x individual brightness can be controlled through its PWMx
register.
LDRx = 11 — LED driver x individual brightness and group dimming/blinking can be
controlled through its PWMx register and the GRPPWM registers.
PCA9624
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 6 September 2012
? NXP B.V. 2012. All rights reserved.
11 of 37
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